As a failure analysis engineer at TI, you get to own the whole process yourself! This means replicating the customer failure on the bench (like an application engineer), poring over the IC design to trace nodes (like a designer) and physically destroy the chip using mechanical and chemical means (like a chemist). You get to play with million dollar machines to narrow down the one defective transistor out of millions on a chip. It's great because unlike other companies where each section is handled by another team, you get to own the process from beginning to end. It's fun because no two problems are the same.