ML Model Intern
As an intern at Synopsys, you will gain hands-on experience while working alongside industry professionals. You will develop and refine skills relevant to your major and future career by contributing to high-impact business projects. The Synopsys intern program integrates our interns into the culture with career opportunities upon graduation. This summer internship is full-time (40 hours/week) beginning May/June 2023 and will last three months.
With advanced technology nodes, the size of the standard cell library has continued to grow. This rich variety of choices for each logic gate provides tremendous flexibility in terms of trading off power, area, and timing and also address cell legalization and routability issues. However, this increases the tool's runtime as it needs to evaluate each of these library cells to make the optimal choice. Static coverage analysis is unable to capture the variation in timing and power based on timing and instance context. Further, different steps in the flow have different library cell usage profiles.
This project aims to develop an ML model that can quickly predict the subset of library cells to evaluate for a given cell to be sized and its slack budget. The intern will first learn about standard cell library timing models and how they are used in estimating the local timing impact. They will then study various examples of sizing that evaluate all library cells and develop and ML model that quickly predicts the library arc delay. This will then be used together with the given slack budget to rule out cells that degrade delay as well as those that improve delay more than the budget. They will validate the accuracy of this prediction on the given examples and then integrate it into the tool. Once integrated, they will verify the runtime improvement from the resulting library cell pruning and also ensure that the the quality of results is minimally affected.
- ML/analytical model development and validation
- C++ programming
- Python scripting
- Runtime profiling
- Knowledge of gate sizing and delay models is a plus
- Currently enrolled in college pursing MS or PhD
Business Area Description
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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