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Semiconductor Assembly Specialist Intern

Tata Global Internships

Brief - 

Brief: 
Tata Semiconductor Assembly and Test (TSAT) is a wholly owned subsidiary of Tata Electronics. We are a Semiconductor Assembly and Test organisation involved in manufacturing Integrated circuits (IC)products for global customers. 
Our technology portfolio includes Wirebond, Flip Chip, Integrated Semiconductor Packaging and Chiplet Heterogenous Integration. We are the first semiconductor IC assembly company in the country, and our key strength is that all our technology has been indigenously developed with our employees hired from around the world with over 2000+ years of domain expertise.
Global presence: India (HQ), Singapore, Taiwan, USA
Mission: Creating value for our stakeholders through innovation, execution, and quality; safely harnessing the power of people and technology.                             Vision: Delivering sustainable and trusted electronics solutions for our customers globally.                                                                                    

Services : Semiconductor IC Design, Wafer/Die Preparation, Semiconductor Assembly, Backend operations, Testing, Failure Analysis & Reliability                     Year in Business : Since March 2023                                                                       No.of Employees : ~750      
                   

Context:

We have completed POC (Proof of Concept) for a top global consumer. We are gearing up for an intermediate build that sets us up for engineering builds and ramp to production from thereon. 

Why does something need to change now?

The customer is the top player in global consumer electronics. The project has been progressing on stringent timelines towards engineering builds and ramp. We need an independent contributor to work outside the daily operational rigours to develop foundational understanding that supports the process development team and create IP that sets us apart from the competition.

 

Project scope:

Electromagnetic Interference Shielding Process development for high end SoC (System on Chip) for smartphone applications

 

Deliverables:

  • Phase 1 - Develop foundational models of the process
  • Phase 2 - Validate the model through co-relation with empirical data

 

Skill sets required:

Looking for a candidate with a strong background in one or more of the following areas: Thermodynamics, statistics and design of experiments, fracture mechanics, material sciences, fluid mechanics simulations, chemical diffusion, interfacial dynamics.Deep understanding of sputtering / physical vapour deposition (PVD) preferred

 

Semiconductor Assembly Specialist Intern